| 摘要 |
Detection circuitry for a capacitance switch including a source of two-state electrical pulses that are supplied to two clock nodes 180 DEG out of phase, a buffer connected to one of the switch connection nodes, means between the clock nodes and the switch connections to maintain the buffer input at one condition when the capacitance switch is closed and to cause the buffer input conditions and the buffer output signal to vary with the two-state pulses when the capacitance switch is open, and a frequency detector connected to the buffer output.
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