发明名称 MANUFACTURE OF FET
摘要 PURPOSE:To allow a gate electrode to perform self-alignment resulting in the reduction of the seat resistance component of series resistance, by using SiO2 as the etching mask for a gate metal. CONSTITUTION:The SiO2 film 32 is adhered on a GaAs semi-insulating substrate 31, and the SiO2 film, corresponded to an active layer 33 forming region, is removed. Thereafter, with the SiO2 film 32 as a mask, Si<+> 34 is ion-implaned and annealed resulting in the formation of the active layer 33. Next, after sputtering a Ti/W film 35, an SiO2 film 36 is adhered and etched into a gate electrode pattern. Thereat, a photo resist 37 serving as a mask is left, and, with the SiO2 film 36 as a mask, the Ti/W film 35 is etched. Then, after Si<+> 40 is ion- implanted, with the SiO2 film 32, photo resist 37 and SiO2 film 36 as masks, then source/drain regions 41 and 42 are formed by a high temperature annealing, and the photo resist is removed, the metal 43 for source/drain electrodes is adhered. On this metal, a photo resist 45 is applied, and, when it is scraped by an ion milling, source/drain electrodes 46 and 47 are formed.
申请公布号 JPS58102564(A) 申请公布日期 1983.06.18
申请号 JP19810200185 申请日期 1981.12.14
申请人 HITACHI SEISAKUSHO KK 发明人 UMEMOTO YASUNARI;KAMIYANAGI KIICHI;TAKAHASHI SUSUMU;NAKAMURA MICHIHARU
分类号 H01L29/812;H01L21/265;H01L21/28;H01L21/338 主分类号 H01L29/812
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