| 摘要 |
PURPOSE:To obtain a high-speed, high-density memory or logic circuit by providing a gate electrode on a gate insulating film on a semiconductor substrate, supplying electric charges to one of the diffused layers provided on both sides of the electrode, thereby controlling the conductivity of channels. CONSTITUTION:The gate insulating film 13 and the gate electrode 15 are formed on the P type Si substrate 11, and N<+> layers 12 and 12' are provided on both sides thereof. The layer 12' is the source of an FET 11 and also the gate of a Tr12. The layer 12 is the drain of the FET11 and the gate of a Tr13. Electric charges are injected into the layer 12 from a terminal B, and transferred to the layer 12' via a channel 14. The width of the generated space charge layer is varied by supplying the electric charges to the layer 12 and 12', thereby the conductivity of channels 30 and 30' directly under the layers 12 and 12' is controlled. In this constitution, the configuration of a memory cell is equal to the occupying area of one FET and can be miniaturized. Since the difference in currents under the ON-OFF states of a J type FET is detected; a sensing amplifier, which is characterized by large read-out signals and high sensitivity, is not required; and a high-density, high-speed dynamic RAM can be obtained. |
