发明名称
摘要 1429323 Data processing systems DIGITAL EQUIPMENT CORP 10 Oct 1973 [10 Oct 1972] 47348/73 Heading G4A The system includes a central processor and a separate module for processing instructions forming a distinct class. The class may consist of floating point instructions, for example. An instruction processing cycle is initiated on the arrival at the modules of a transfer signal generated by the central processor when it decodes an instruction in the said class. The module includes a control unit which processes each instruction in a series of processing cycles. During each cycle the unit generates control and synchronizing signals and then prevents a further cycle until the next transfer signal is received. The generation of the control signal is inhibited in the final processing cycle. The synchronizing pulse is passed to the central processor which reverts to a normal operating sequence and calls for the next instruction, which may be processed concurrently with the processing cycle occurring in the module. Several modules may be connected to the central processor, each module being pertinent to a respective class of instructions.
申请公布号 JPS5828609(B2) 申请公布日期 1983.06.17
申请号 JP19730114325 申请日期 1973.10.11
申请人 DIGITAL EQUIPMENT CORP 发明人 REONAADO BII HYUUZU;BURUUSU EI DERAJI;EICHI EI FUAN DO GOORU
分类号 G06F7/00;G06F7/76;G06F9/30;G06F9/34;G06F9/38 主分类号 G06F7/00
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