发明名称 DATA TRANSFER CONTROLLING CIRCUIT
摘要 PURPOSE:To improve the efficiency of common use of a system in which a peripheral device is used a plurality of CPUs in common, by providing a circuit which can modify a device recognizing address of a device requested for transfer with a device recognizing address of a device requesting the transfer. CONSTITUTION:A CPU1 transmits an address set by an address setting circuit 9 of a peripheral device 3, a sender address and control data. The device 3 transmits the address from a buffer 6 to a comparator 8. The sender address is given to the comparator 8. A coincident signal of the comparator 8 is transmitted to a data buffer 12, the control data is fetched to the buffer 12 and given to an instruction controlling circuit 14. The circuit 14 judges the connection request of the CPU1, the sender address and the set signal are set to an address modification controlling circuit 17, a modification signal is transmitted to the comparator 8. After the modification signal is given to the comparator 8, the device 3 is actuated by taking the modification signal as an address and is not operated with the address from a CPU2.
申请公布号 JPS58101322(A) 申请公布日期 1983.06.16
申请号 JP19810200048 申请日期 1981.12.14
申请人 NIPPON DENKI KK 发明人 SHIMADA SETSUO
分类号 G06F13/14;G06F13/40 主分类号 G06F13/14
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