| 摘要 |
PURPOSE:To perform high speed operation of an MOS type integrated circuit element and to highly integrated the element by ultrafinely forming the element by forming the channel region of the MOSFET in a vertical direction to a substrate. CONSTITUTION:N<+> type source and drain 2, 3 are formed at both sides of the projection 6 of a P type Si substrate, and an N<+> type layer 7 is formed discontinuously to the layers 2, 3 on the projection 6. Gate electrodes 5 are formed via a gate insulating film 4 on both side surfaces of the projections 6. The distances between the layers 7 and 2, and between the layers 2 and 3 are shortened so as not to punch-through, and the P type impurity density of the substrate is suppressed to low value. According to this configuration, the effective resistance value between the source and the drain becomes low at the FET ON time due to the interposition of the layer 7, the current drive force of the element is increased, thereby enabling to perform high speed operation and to form the short channel in vertical direction. |
