发明名称 BIPOLAR TYPE RAM
摘要 PURPOSE:To prevent occurrence of bad influence on the writing and reading operations caused by the saturated operation of the driving FET and realize a bipolar type RAM which can operate at a high speed and consumes less electric power, by connecting a pnp FET as the load of the npn FET. CONSTITUTION:A pnp FET Q'11 (Q'21), on which a pnp FET QL (Q'L) is installed as the load of an npn driving FET Q11 (Q21), whose base is connected to the collector of the Q11 (Q21), whose emitter is connected to the base of Q11 (Q21), and whose collector is connected to the substrate, is installed. When the Q11 is turned ON and operates in the saturated area in this memory cell, the electric current of the collector of the Q11 becomes smaller than that of the base of the Q11, and, by the difference in the electric currents, the Q'11 is turned ON and flows out the electric current of the base to the substrate, and thus limits the increase of the electric current of the base.
申请公布号 JPS58100295(A) 申请公布日期 1983.06.14
申请号 JP19810198591 申请日期 1981.12.11
申请人 HITACHI SEISAKUSHO KK;HITACHI MAIKURO COMPUTER ENGINEERING KK 发明人 MIWA HIDEO;NAKANO TETSUO;KATOU YUKIO
分类号 G11C11/411;H01L21/8229;H01L27/102;H03K17/04 主分类号 G11C11/411
代理机构 代理人
主权项
地址