发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PURPOSE:To reduce the power consumption and reduce the increment of the number of elements, by arranging memory cells, where polysilicon resistances are used as loads, in a matrix and supplying power commonly to plural cells through a current limiter where the resistance is lowered by the rise of temperature. CONSTITUTION:Memory cells M11-Mmn where polysilicon resistance elements are used as load resistances R1 and R2 of MOSFETs T1 and T2 are arranged in a matrix to constitute a memory cell array 21. Current limiters 22 where resistance values are raised by the rise of temperature are constituted with, for example, MOSFETs to supply power commonly to plural memory cells. Thus, the power consumption is reduced, and the increment of the number of elements is reduced considerably to make them into an integrated circuit with advantage because the current limiter is used commonly for plural memory cells.
申请公布号 JPS5898895(A) 申请公布日期 1983.06.11
申请号 JP19810197260 申请日期 1981.12.08
申请人 TOKYO SHIBAURA DENKI KK 发明人 TAKESHITA YUUJI;ENDOU NORIO
分类号 G11C11/413;G11C5/14;G11C11/41 主分类号 G11C11/413
代理机构 代理人
主权项
地址