发明名称 CONTROLLING SYSTEM OF MICROPROGRAM
摘要 PURPOSE:To ensure an optimum machine cycle time for each operation, by dividing the microinstrucions to a primary control part and a secondary control part and at the same time providing the suppression bit to the primary or secondary control part to inhibit the renewal of the corresponding microinstruction for a prescribed machine cycle time. CONSTITUTION:The microinstruction of a primary control part is stored in a register 5 with a prescribed address of an address register 1, and an addition is carried out. At the same time, the microinstruction of a secondary control part is stored in a register 6. Thus a multiplication is carried out. Then the microinstruction of the main control part is stored in the register 5 with the next address of the register 1, and an addition is performed. For the secondary control part, the renewal of the register 6 is suppressed by a detecting circuit 9 and a microinstruction renewing circuit 8 since the renewal suppression bit 10 of the preceding microinstruction is set at ''1''. Thus the multiplication is carried out continuously. Then the circuit 8 releases the suppression of renewal for the register 6 after the time of 2 machine cycles elapsed.
申请公布号 JPS5897747(A) 申请公布日期 1983.06.10
申请号 JP19810195361 申请日期 1981.12.04
申请人 HITACHI SEISAKUSHO KK 发明人 FUJIOKA YOSHINORI;NAKAI KOUICHI;TSUNEHIRO TAKASHI
分类号 G06F9/22 主分类号 G06F9/22
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