发明名称 RECORDING SPEED DISCRIMINATION CIRCUIT
摘要 <p>PURPOSE:To discriminate the recording speed, by using a rotation speed detection signal and a reproduction control signal and utilizing the principles that the number of pulses of the detection signal within one period of the control signal is unchanged and depends on the recording speed. CONSTITUTION:In applying this circuit for a VTR reproducing information recorded in three different speeds, a counter 10 is provided, which counts a drum speed detection pulse FS and is reset with a control signal CTL. The circuit is provided with a window pulse forming circuit 20 to which the output of the counter is applied and which gives an output in response to the recording speed, a discriminating circuit 40 to which this output and the control signal CTL are applied and which discriminates malfunction due to noise, and a latch circuit 50 latching the discriminating output. The tape speed is switchingly controlled with discrimination outputs betaI-betaIII corresponding to the recording speed obtained from the latch circuit 50. Since the discriminating time of recording modes RI- RIII is for several Hz's share of the control signal CTL, the switching can be done in a time as short as 0.1sec.</p>
申请公布号 JPS5897149(A) 申请公布日期 1983.06.09
申请号 JP19810195862 申请日期 1981.12.04
申请人 SONY KK 发明人 IWASAKI TOORU;FUTAGAMI AKIRA
分类号 G11B15/087;G11B15/46 主分类号 G11B15/087
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