| 摘要 |
PURPOSE:To decrease the number components and to attain a selection circuit with simple constitution and high reliability, by decoding the result of addition and subtraction between an address selection set value and an address signal and locating an address space in the unit of memory block. CONSTITUTION:A numeral B=0011 is set to an address selection switch 1a in response to the number 4 of memory blocks 2..., and subtraction processing is taken with an upper-order bit A of an address signal at an addition/subtraction section 1b, then the shift in the memory address space is done in the unit of bits of the address signal. Thus, decoding is done for the result of operation, only 0-3 with a decoder 1c for the result of subtraction, the location of the address space is done in the unit of the memory blocks 2.... Since the address selection is not required for each memory block, the number of components can be decreased and the memory unit address section circuit with simple constitution and high reliability is attained. |
