| 摘要 |
PURPOSE:To contrive to reduce the intervals between the gate, the source and the drain of a semiconductor device to the limit, and to enhance high frequency performance thereof by a method wherein the source and the drain are formed by selfalignment utilizing the directional property of ion implantation and thermal stability of an insulating film, and the gate electrode is formed by selfalignment according to ion milling. CONSTITUTION:An SiO2 film 13 is stacked on an n type epitaxial layer 12 on a semiconductor GaAs substrate 11, excessive plasma etching is performed to the film 13 using a Pt mask 14 to form windows 15, 16, and eaves parts are formed. After ions are implanted to form n<+> type lavers 17, 18, and is annealed at about 800 deg.C, the surface is covered with a resist 19. Thickness of the film 191 is enough with 1/2 of thickness of the film 192. Then ion milling is performed to remove the surface part of the resist 19, the flat surface is formed exposing the Pt mask 14, the Pt mask 14 and the SiO2 film 13 are etched to be removed, and a gate electrode window 23 is formed. Moreover a gate metal is evaporated, the resist is lifted off, the electrode 24 matched with the layers 17, 18 is formed, and ohmic electrodes 25, 26 are formed finally. By this constitution, the intervals between the source, the gate and the drain can be reduced easily and surely up to the submicron region, and the high frequency characteristic can be improved greatly. |
