发明名称 DESIGNING METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To make the size of a semiconductor chip small, and to improve the degree of integration by ameliorating the utilization efficiency of the area of the chip. CONSTITUTION:Blocks 14 are arranged into the internal area 13 of the semiconductor chip in the (x) direction, and these block rows are disposed only by rows required in the (y) direction. The nearer the positions of the blocks to a central section are, the smaller the size YB in the (y) direction of each block 14 is made, and the nearer the positions of the blocks to the central section of the chip are, the wider the intervals LX (space for wiring among the blocks in the (x) direction) of the block rows are made and the nearer the positions of the blocks to peripheral sections are, the narrower the intervals are made. The size YB of the blocks 14 is determined so that intervals LX at the positions correspond to the density of wiring among the blocks in the (x) direction at the positions. Consequently, the generation of wasteful space can be prevented while space for wiring among the blocks required is ensured among the block rows because the size in the (y) direction of each block is changed in consideration of the density of wiring at the positions of the blocks. Accordingly, the internal area of the semiconductor chip can be utilized efficiently as compared to conventional devices, and equal functions can be integrated onto the small semiconductor chip.
申请公布号 JPS5895855(A) 申请公布日期 1983.06.07
申请号 JP19810193452 申请日期 1981.12.01
申请人 HITACHI SEISAKUSHO KK 发明人 SUMIMOTO TSUTOMU;KATOU MASAO;MINAMI HIDEKAZU
分类号 H01L21/822;H01L21/82;H01L27/04;H01L27/118 主分类号 H01L21/822
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