发明名称
摘要 PURPOSE:To prevent the latency of an on-stack trouble by setting a loop by a tested path and an interrupt path and supplying a two-way voltage and a detecting whether the loop current is flowed or not under the state where off instructions are issued to a switching element in each stage. CONSTITUTION:A testing loop is set by trunk TRK, switch cross points and interrupt cross points of network NW, and testing circuit TST, and floating current sources CSA and CSB which can switch the currnet direction and current detector circuits ICKHA and ICKHB are provided in TST, thereby making two-way current supply possible. Then, cross points of NW are turned OFF in order from the first stage; and the current is flowed in the testing loop to detect the loop current when a cross point which should be in an OFF-state is in an ON-state, and this cross point is decided to be an on-stack trouble.
申请公布号 JPS5826869(B2) 申请公布日期 1983.06.06
申请号 JP19770115560 申请日期 1977.09.28
申请人 HITACHI SEISAKUSHO KK;NIPPON DENSHIN DENWA KOSHA 发明人 KOJIMA KIMIFUMI;YASUI NAOHIKO
分类号 H04M3/26;H04Q1/24;H04Q3/52 主分类号 H04M3/26
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