发明名称 |
MEMORY DEVICE |
摘要 |
A memory system is provided wherein extended injection-limited programming techniques attain a substantially uniform programming behavior from an ensemble of fabricated devices or cells to provide the maximum obtainable voltage threshold shift within a minimum time period. In order to produce these desired results, a floating gate of a device is charged by applying to the control gate of the device a first voltage during a portion of this time period which produces an accelerating field in a dielectric layer disposed adjacent to the floating gate and then applying to the control gate during the remaining portion of this time period a second voltage of greater magnitude than that of the first voltage prior to or when the accumulation of charge on the floating gate causes a retarding field to be established in the dielectric layer. |
申请公布号 |
JPS5894196(A) |
申请公布日期 |
1983.06.04 |
申请号 |
JP19820162406 |
申请日期 |
1982.09.20 |
申请人 |
INTERN BUSINESS MACHINES CORP |
发明人 |
HAABAATO KAARU KUTSUKU;RONARUDO ROI TORAUTOMAN |
分类号 |
G11C17/00;G11C11/34;G11C16/04;G11C16/10;G11C16/34;H01L21/8247;H01L29/788;H01L29/792 |
主分类号 |
G11C17/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|