Page controlled cache directory addressing.

摘要

Cache class addressing controls are improved by modifying the congruence class addresses in a manner that distributes data accessed from storage pages more uniformly among the plurality of the cache congruence classes. The value of at least the lowest-order bit (19) in the external page address field in the CPU requested address is used to control the inversion of the second highest-order bit position (21) in a congruence class selection field which is obtained from the highorder part of the internal page address field in the CPU requested address. Thus a congruence class address (CCA) is generated that tends to smooth the fregency distribution of class use in a cache directory, thereby reducing the cache miss rate and correspondingly improving processor performance.