发明名称 |
Transistor-transistor logic circuit. |
摘要 |
<p>A transistor-transistor logic circuit comprises an input transistor (Q1) having at least one emitter which serves as an input (IN) and a collector controlling the base current of an output transistor (Q2) having a collector which serves as an output (OUT). A series circuit of a Schottky barrier diode (SBD) and a PN junction diode (D) is provided between the collector and emitter of the output transistor so as to clamp the high-level of the output.</p> |
申请公布号 |
EP0080254(A2) |
申请公布日期 |
1983.06.01 |
申请号 |
EP19820304367 |
申请日期 |
1982.08.18 |
申请人 |
FUJITSU LIMITED |
发明人 |
OMICHI, HITOSHI;TANIZAWA, TETSU;MITONO, YOSHIHARU |
分类号 |
H01L27/07;H03K19/013;H03K19/088;(IPC1-7):03K19/088;03K19/013 |
主分类号 |
H01L27/07 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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