发明名称 |
DECODER CIRCUIT |
摘要 |
<p>A decoder circuit comprises a differential amplifier circuit which receives one or a plurality of line selection signals which are to be decoded, switching circuits for switching predetermined line systems in high or low level states according to the output signal supplied from the differential amplifier circuit, and constant current supplying circuits for supplying constant current to predetermined lines of the above line systems according to the signal supplied from the switching circuits. The switching circuits are connected in parallel with respect to the constant current supplying circuits.</p> |
申请公布号 |
CA1147475(A) |
申请公布日期 |
1983.05.31 |
申请号 |
CA19800367472 |
申请日期 |
1980.12.23 |
申请人 |
FUJITSU LIMITED |
发明人 |
ISOGAI, HIDEAKI;TANAKA, MIKI |
分类号 |
G11C11/41;G11C11/413;G11C11/415;G11C11/416;H03K17/62;H03M7/00;(IPC1-7):G06F13/00 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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