| 摘要 |
PURPOSE:To reduce the element area and contrive not to be suject to the influence by the field from the outside, by forming metallic electrodes via insulators on the surface of a P-N junction and then covering the surface of these metallic electrodes. CONSTITUTION:An N type region 2 is formed in a P type semiconductor substrate 1. Next, the insulator 3 is adhered on the surface except for a region whereon a gate region is formed. Next, conductors 4 containing P type semiconductor material are formed on the part to become a gate region and on the substrate 1. Next, the conductor 4 is thermal-diffused into the region 2 resulting in the formation of the P type gate region 5, and the surface of the conductor 4 is covered with the insulation layer 8. A drain electrode 6 and a source electrode 7 are formed on the region 2 by a low resistance contact, and accordingly a junction type FET wherein the substrate 1 is a gate terminal is formd. Thereby, when reducing the element area and leading the electrode 6 or 7 out on the substrate, the P-N junction between the surface of the substrate 1 or the substrate 1 and the region 2 is not at all subject to the influence by the drain or source electrode. |
