发明名称 INPUT DETECTION CIRCUIT
摘要 PURPOSE:To increase the amount of information of input signals and to provide a new function to a digital system, by providing an intemediate level state in addition to high and low level states, and detecting also the intermediate level state. CONSTITUTION:An input signal In is given to a logical circuit 13 through two inverting type input buffer circuits 11, 12 having different threshold voltage state. The logical circuit 13 performs a prescribed logical operation. When the levels of the input signal In are VDD-VIH1, levels of low; high; high are obtained at outputs A, B, C of the circuit 13, and when the levels of the In are intermediate level of VIL1-VIH2, and VIL2-GND, high; high; low and high; low; high levels are obtained at the outputs A, B, C, allowing to discriminate the high; intemediate; low, three levels of the input signal In.
申请公布号 JPS5890853(A) 申请公布日期 1983.05.30
申请号 JP19810189547 申请日期 1981.11.26
申请人 TOKYO SHIBAURA DENKI KK 发明人 KOBAYASHI MAKINARI
分类号 G11C11/419;H03M5/04;H03M13/00;H04L25/03;H04L25/06 主分类号 G11C11/419
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