发明名称 ERROR CORRECTING SYSTEM FOR DATA AT STORAGE PART
摘要 PURPOSE:To prevent the occurrence of a correction unable state which is due to the overlap of 1-bit errors, by providing an access producing circuit to a storage part controller and giving an access also to the storage region that receives no access for a long period of time by a CPU, etc. CONSTITUTION:When a start is applied from a service processor SVP, a storage controller MCU is ready to check a data. Then an access port is controlled via a priority deciding circuit PRT, and no access is given to a buffer memory MCUBM by a CPU, etc. by the address given from an access producing circuit ACG of the controller MCU. Then an access is successively given to all addresses of a main storage device MSU which receives no access for a long period of time. The reading data of the device MSU is checked by a data checking circuit DCH, and a 1-bit error is corrected by an error correcting circuit CRT. Thus an access is given at a proper time point to all addresses of a storage device that receives no access from a CPU, etc. for a long time of period. In such a way, the occurrence of a correction unable state in which the 1-bit errors overlap each other due to the alpha rays, etc. can be prevented.
申请公布号 JPS5888896(A) 申请公布日期 1983.05.27
申请号 JP19810185970 申请日期 1981.11.19
申请人 FUJITSU KK 发明人 NISHIDA HIDEHIKO;ETSUNO MINORU;HATSUTORI AKIRA
分类号 G06F12/16;G06F11/07 主分类号 G06F12/16
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