| 摘要 |
PURPOSE:To correct microinstruction without decreasing the processing ability of a processor, by continuing the control of microprogram at the stored address and succeeding, after the microinstruction from a processor of a spare system is executed at a data processor of a present usage system. CONSTITUTION:A present use system data processor ACT and a spare system data processor SBY are connected, and the ACT stores instructions read out from a storage device to an instruction register IR1. This instruction corresponds to a program with an instruction group stored in addresses A0-A4 of a control memory CM1. The instruction of the register IR1 is converted into a head address A0 of the program with a microaddress conversion circuit MAC1 and inputted to the control memory CM1. The instruction is inspected at a parity check circuit PCHK1, and when normal, a stored data is summed and given to an operation bus RBS1. After executing the instruction from the SBY at the device ACT, the control of the program at the stored address and succeeding is continued, allowing to correct instructions. |
