发明名称 INSULATED GATE TYPE SEMICONDUCTOR DEVICE
摘要 PURPOSE:To enable the formation of a protection diode at an arbitrary position of a MOSFET substrate by a method wherein a polycrystalline Si layer having a loop PN junction is formed independently from a polycrystalline Si gate of MOSFET and a source electrode thereof in a back-to-back protection diode wherein a polycrystalline Si layer is used. CONSTITUTION:A polycrystalline Si layer which becomes a MOSFET protection diode is formed on an insulation film 6. This polycrystalline Si layer is composed of a P type diffusion Si layer 7 formed in a loop and of N<+> type diffusion layers 7c and 7b adjacent to the layer 7a inside and outside the same via a PN junction. The polycrystalline Si layer 7 which becomes the protection diode is formed on the insulation film 6 in the same process with that for forming a mesh-shaped polycrystalline Si gate of MOSFET, separately from the latter. Among the polycrystalline Si layers, the N<+> type diffusion layer 7b located inside is connected to the gate of MOSFET via an Al wiring 8', while the N<+> type diffusion Si layer 7c outside is connected to a source electrode via an Al wiring 8.
申请公布号 JPS5887873(A) 申请公布日期 1983.05.25
申请号 JP19810185436 申请日期 1981.11.20
申请人 HITACHI SEISAKUSHO KK 发明人 OOTAKA SHIGEO;ITOU HIDESHI
分类号 H03F1/52;H01L27/02;H01L27/04;H01L27/06;H01L29/78;H02H7/20;H03F1/42 主分类号 H03F1/52
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