| 摘要 |
PURPOSE:To obtain an information processor which has simplified circuit constitution, by providing an arithmetic circuit which calculates the memory address of an instruction word to be prefetched next from the contents of a memory address counter and an address difference counter. CONSTITUTION:An arithmetic circuit calculates the memory address of an instruction word to be prefetched next from the contents of a memory address counter and an address difference counter. For example, when a memory address is inputted to a data bus 13, its high-order digit bit is set in an instruction prefetching address counter RLOC12 through a signal line 14, and the low-order digit bit is set in a readout pointer RIRP17 through a signal line 18; and the address difference counter RLCT20 is reset by a clear signal CLR. On the basis of the held contents of the RLOC12, an instruction word is stored in an instruction buffer 11 and counting-up operation is performed by a count-up signal UP1. Then, the arithmetic circuit 21 calculates the memory address of an instruction word to be prefetched next. |
