| 摘要 |
PURPOSE:To perform an easy and quick IC testing by arranging an ROM with a test pattern written-in, an ROM with a correct test output written-in, a coincidence circuit for judging test results and the like in an IC. CONSTITUTION:An ROM4 in which an external test pattern and an FF rest pattern are memorized as accessed with an address counter 6 operating through a built-in test control circuit 11 and an ROM5 in which a solution pattern output and a solution FF pattern output are memorized are arranged in an IC1. First and second coincidence circuits 71 and 72 and the like are povided in the IC1 to determine whether outputs of a logic combination circuit 2 and an FF3 responding to outputs read out of the ROM4 each coincide with outputs read out of the ROM5. Therefore, an IC testing can be performed easily and quickly depending only on the monitoring of judgement on the coincidence without increasing the number of terminals simply by starting it through a circuit 11. |
