| 摘要 |
PURPOSE:To perform a clear reception channel display, by synchronizing a channel display signal with a sampling clock, through the use of a synchronizing circuit logically operating the output of a plurality of stages of D-FFs, in a television receiver using liuid crystal. CONSTITUTION:A pulse width signal (d) in which the pulse width is changed corresponding to the reception channel and which is obtained by applying a saw tooth wave and a tuning voltage to a voltage comparison circuit, is inputted to the 1st D-FF17 and an output signal Q1 of the D-FF17 is applied to the 2nd D-FF18. An output signal Q2' of the D-FF18 is applied to an NOR gate 19 together with the signal Q1 to obtain a channel display signal (f). After the signal is amplified, it is sampled with a sampling clock from a control signal generating circuit 14 at an A/D conversion circuit 11 and converted into a digital signal, and after the signal (f) is serial-parallel-converted at a signal electrode driving circuit 13 and displayed on a liquid crystal panel. |
