发明名称 MUTING CIRCUIT
摘要 PURPOSE:To prevent sudden generation of an interchannel noise on the completion of a broadcast without providing a muting ON/OFF switch, by outputting the interchannel noise during channel selection, and stopping the output of the noise on the completion of the broadcast. CONSTITUTION:A muting signal outputted from a PLL controller 10 goes up to a level H on channel selection, and is tuned to a desired frequency and then goes down to a level L a specified time later. This signal resets a D type flip- flop 12 on every channel selection without fail. When a broadcast is received after the channel selection, a clock input goes down to the level L and after the broadcast ends, it goes up to the level H. If the broadcast ends abruptly, the level H of the input D is read at the leading edge of the clock input, and the Q output goes up to the level H to perform muting through a diode D1. When no broadcast is received during channel selection, the Q output does not go up to the level H and muting is not performed.
申请公布号 JPS5881338(A) 申请公布日期 1983.05.16
申请号 JP19810179659 申请日期 1981.11.11
申请人 MATSUSHITA DENKI SANGYO KK 发明人 KAKIHARA EISHIN
分类号 H04B1/10;H03G3/34 主分类号 H04B1/10
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