| 摘要 |
PURPOSE:To obtain a low-priced A/D converter which has the reduced occupied area of a chip, controls variation characteristics, and reduces power consumption, by performing parallel comparison type A/D conversion under plural kinds of time-division sequential control. CONSTITUTION:In the 1st stage, a logical circuit 17 controls an analog switching matrix 16 to apply the voltage of a reference voltage source 11 to a resistance network 12 as it is, and a comparator array 13 compares an analog input voltage VIN with the voltage of the resistance network 12 to decide on the high- order digit bit through a logical circuit 17. In the 2nd state, the analog switching matrix 16 is controlled to supply a voltage corresponding to the high-order digit bit from the logical circuit 17 to the resistance network 12, and a parallel comparison is made again to decide on the high-order digit bits. Consequently, the resistance element is made small to reduce the occupied area of a chip, and LSI-implementation is performed; and power consumption is reduced at low cost and conversion characteristics are determined under digital control. |
