发明名称 STEP-OUT DETECTION SYSTEM
摘要 PURPOSE:To detect the state of synchronism between a high frequency and a low frequency signal, by supplying the high frequency signal to a flip-flop as data after frequency division, and also supplying the low frequency signal as a clock signal simultaneously. CONSTITUTION:A reference signal inputted to a terminal 1 is inputted to the clock side of a flip-flop 15. The output signal of a voltage controlled oscillator 4 is inputted to a frequency divider 13, whose frequency division output is supplied to the data side of the flip-flop 15. The flip-flop 15 outputs the state of the data signal at a rise of the clock signal. A monostable multivibrator 16 is driven by the output signal of the flip-flop 15. While a phase-lock loop is locked, the output signal of the multivibrator 16 has a specified level. Thus, step-out detection performed by the simple constitution.
申请公布号 JPS5881336(A) 申请公布日期 1983.05.16
申请号 JP19810180238 申请日期 1981.11.10
申请人 FUJITSU KK 发明人 TANIGUCHI YOSHIHIKO;SUZUKI HAYASHI;NAKAMURA YOSHINORI
分类号 H03L7/095 主分类号 H03L7/095
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