| 摘要 |
PURPOSE:To make scale of a divider circuit small to have a proper scale and at the same time to decrease the arithmetic time, by using two divider circuits consisting of shift registers which are exactly equal to each other, giving the same frequency of divisions to both the divisor and the dividend with the same original root alpha and defining the numerator as the answer of division when the denominator is equal to alpha deg.. CONSTITUTION:For the divider circuits 22 and 22b, the contents of a shift register which is a primary component element are multiplied by alpha<-1> every time the shift pulse is supplied. A alpha deg. pattern detecting circuit 23 detects whether the contents of the shift register constituting the circuit 22b is set at alpha deg. or not. A control circuit 24 controls the circuits 22, 22b and 23 respectively. The clock pulse of the circuit 24 is stopped when the circuit 23 detects alpha deg., i.e., 1. Thus an arithmetic result c=b/a is delivered to an output terminal 21. |
