发明名称 PLANE TRANSISTOR STRUCTURE
摘要 <p>The structure comprises a collector area in a semiconductor chip (10) with a conductivity n- and a base area (11) diffused on the main surface of the chip (10) and having a p-type conductivity. It comprises a transmitter area diffused in the base area (11) of n+ type conductivity and a passivation layer (13). This layer covers the portion of the main surface of the chip (10) which is not used as a contact window. A first ring-shaped area (14) is diffused around the base area (11) in the main surface of the ship. It has a p-type conductivity. A second area of n+ conductivity is diffused around the ring-shaped area (14) in the main surface of the chip (10). It acts as a stop ring (15). On the passivation layer (13), there is deposited a metal layer (D) which works as a cover electrode, surrounds the base area (11) by forming a ring, overlaps the edge of the base area (11), extends up to above the second annular area (15) and comes in contact in the first area (14) with said area (14). The potential of the first ring area (14) and therefore the potential of the cover electrode (D) is thus fixed so as to be comprised between the potential of the base area (11) and the potential of the semicondutor ship (10) forming the collector area.</p>
申请公布号 WO1983001709(A1) 申请公布日期 1983.05.11
申请号 DE1982000174 申请日期 1982.09.03
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