发明名称 VERFAHREN ZUR ANALOG-DIGITALEN MESSWERTWANDLUNG UND ZUM VERGLEICH MIT WAEHLBAREN DIGITALEN GRENZWERTEN
摘要 The measured value is represented by an analog voltage and is converted into a proportional frequency by a voltage-frequency converter, the frequency pulse being controlled by a logic. They are processed in a two-way counter, transfered to a memory and digitally displayed. The control logic receiver, or generator, a clock pulse for transmission of the last digital measured value to the memory. It also sets the counter and a sign generating flip-flop to a starting value, and controls the voltage-frequency converter operation. A zero test circuit transmits a pulse, when a zero counter state appears at negative starting value, for the counter switching. The measured value conversion is terminated by the control logic after a preset time interval. The digital measured value, accepted by the memory after conversion, is supplied to the digital display via a seven-segment decoder. The stored, digital measured value is compared by two identical comparators with two digital limit values.
申请公布号 DD146354(B1) 申请公布日期 1983.05.11
申请号 DD19790215909 申请日期 1979.10.01
申请人 发明人
分类号 H03M1/60;H03M1/00 主分类号 H03M1/60
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