发明名称 SIGNAL FREQUENCY COUNTING CIRCUIT
摘要 PURPOSE:To enable the stable frequency counting of a signal such as signal transmission, etc. whose frequency changes by detecting a series of several bits of the received code when the frequency is stable. CONSTITUTION:A square wave signal which is high or low in level corresponding to signal transmission, etc. is generated by means of the first wave form conversion circuit 1 and the second wave form conversion circuit 2 and a frequency counting circuit 4 counts clock during this square wave signal is in high level. High level set pulse is outputted by the circuit 4 and is impressed into a stable frequency detection pulse signal generation circuit 5 when clock count value comes to a predetermined level value predetermined by a set up circuit 7. This circuit 5 counts continuous set pulse count and generates a detection pulse judging that frequency is stable when the set up pulse counts surpasses the level value set up by means of the set up circuit 7 so as to control conversion indication circuit 6 thereby to count and indicate frequency counted by the counting circuit 4 at this point of time. The above described construction enables stable frequency counting of a signal such as signal transmission whose frequency changes.
申请公布号 JPS5876772(A) 申请公布日期 1983.05.09
申请号 JP19810175467 申请日期 1981.10.31
申请人 HITACHI DENSHI KK 发明人 OKUTSU YUUJI
分类号 G01R23/10;(IPC1-7):01R23/10 主分类号 G01R23/10
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