发明名称 SIGNAL PROCESSOR
摘要 PURPOSE:To increase the processing speed of a signal and to increase the processing volume of data within a sampling period of the input data, by using a hardware to control the address of a delaying memory for a digital reverberation adding device. CONSTITUTION:The 1-sampling data of the audio PCM signal is written to a delay memory 20 from a digital I/O port 8 or A/D and D/A converter 9 via an arithmetic device 23. At the same time, the input data is supplied to a multiplier 24 via a multiplexer MUX25 and then multiplied by a multiplying coefficient g1 which is read out of a memory 21 to be fetched to a register of the device 23. The data which is read out of the memory 20 after a delay time Td is selected by the MUX25 and supplied to the device 23 to be added with the input data and then to be written to the memory 20. The data which read out of the memory 20 after the time Td is added with the data stored in the register through the device 23 and supplied to the port 8 and the converter 9. Then the digital reverberation is added.
申请公布号 JPS5875314(A) 申请公布日期 1983.05.07
申请号 JP19810173579 申请日期 1981.10.29
申请人 SONY KK 发明人 SEKIGUCHI KEISUKE
分类号 G10K15/12;G11B20/10;H03H17/08 主分类号 G10K15/12
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