| 摘要 |
PURPOSE:To obtain a monitoring function of monitoring execution instructions correctly by adding simple hardware without spoiling the processing efficiency and reliability of a central processing unit. CONSTITUTION:After an instruction is fetched, or after an interruption decision is made, an execution signal showing the start of interpretation processing or execution processing is outputted from a central processing unit to a common bus. Then, a monitor interface unit 6 monitors information on the common bus 1 to input address data and instruction data to registers 23 and 24 at the timing of a fall 25 of a fetch signal, and then transfers pieces of register information 23 and 24 by the execution signal to a buffer memory 26, thus monitoring execution instructions. Consequently, only executed instructions are monitored. |
