发明名称 TRANSMITTING SPEED CONVERTING SYSTEM FOR SLAVE STATION OF TIME DIVISION MULTIPLEX AND MULTIDIRECTION COMMUNICATION SYSTEM
摘要 PURPOSE:To enable the independent readout of transmission data, by initializing the writing address of a memory with the head pulse of an effective part of end office data and setting the memory of the writing side under a write-enable- state for a section of the transmission data to be written. CONSTITUTION:A writing address counter 2a or 2b of a memory 1a or 1b is initialized by the head pulse of effective end office data 6. At the same time, a memory of the writing side is set under a write-enable-state for a section of transmission data to be written. Then a reading address counter 2b or 2a of the memory 1b or 1a is initialized with a pulse 16 which is obtained by differentiating the rise edge of an alloted burst designating signal 14 through a differentiating circuit 15. Thus a transmission data 9 can be read out of a memory regardless of the writing timing of the data 6 to the memory and with the timing and the time width of the signal 14.
申请公布号 JPS5871743(A) 申请公布日期 1983.04.28
申请号 JP19810171061 申请日期 1981.10.26
申请人 TOKYO SHIBAURA DENKI KK 发明人 TAKENAKA NOBUO
分类号 H04J3/00;H04B7/24;H04L25/05 主分类号 H04J3/00
代理机构 代理人
主权项
地址