发明名称 FAILURE ANALYZING DEVICE FOR INTEGRATED CIRCUIT
摘要 PURPOSE:To achieve quick and accurate analysis for IC by comparing a potential image of a gool IC with that of an IC under inspection by using a device to store and display a picture data. CONSTITUTION:A gool IC 16-1 and an IC 16-2 to be inspected are set, and the distance therebetween is stored in a central processing unit 1. The analyzing position of the good IC 16-1 is designated through a keyboard 22, and a table 18 is moved. No voltage is applied to the IC but an electron beam is applied thereto for a direct storage 7. Next, the state of the corresponding position of the IC 16-2 is stored 7 and fed into RAMs 3-1, 3-2 through changeover operation to effect display 4-1, 4-2. Next, a DC voltage is applied for effecting an electronic beam irradiation, then the storage 7 is made through a judging circuit 9. Then, a like comparision between the state of both the ICs is conducted by using the RAMs 3-1, 3-2, thereby judgement for the quality of the inspected element under operative state can be effected by comparing with the good IC. Displacement of the pattern position of the inspected IC is corrected by, for example, setting a deflection correcting value 8. By this constitution, even unskilled operators can quickly and accurately conduct the failure analysis for a large number of ICs.
申请公布号 JPS5870542(A) 申请公布日期 1983.04.27
申请号 JP19810168841 申请日期 1981.10.23
申请人 FUJITSU KK 发明人 ITOU AKIO;GOTOU YOSHIAKI;FURUKAWA YASUO
分类号 H01J37/28;G01R31/302;G06F11/273;G06F11/32;H01L21/66 主分类号 H01J37/28
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