发明名称 SPEED DETECTOR
摘要 PURPOSE:To improve the speed detection while obtaining more than one signals from one radar by changing output frequency of an oscillator into plurality in a specified synchronization with a pulse modulator to reproduce a Doppler signal from the resulting detection signal. CONSTITUTION:A pulse modulator 1 provides a control signal Pm and a synchronous signal Ps to a variable frequency oscillator 2 and a synchronous detection circuit 3 separately. The oscillator 2 provides a step signal ef of synchronization T to an antenna 6 and a mixer 7 through a directivity coupler 4. An echo wave W received is mixed with a signal ef by means of a mixer 7 and provided to the circuit 3 as Doppler signal edo. Synchronizing the signal Ps, the circuit 3 detects the signal edo to form each Doppler signal sequentially corresponding to respective frequencies f1-f5 which is provided to processing circuits Sc1-Sc5. Speed signals and amplitude signals from the circuit Sc are provided to a computation circuit 10 and a soeed signal corresponding to the max. amplitude signal fed to a subsequent running controller or the like.
申请公布号 JPS5868672(A) 申请公布日期 1983.04.23
申请号 JP19810166869 申请日期 1981.10.19
申请人 KOMATSU SEISAKUSHO KK 发明人 EGAWA AKIRA
分类号 G01P3/42;G01S13/58 主分类号 G01P3/42
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