| 摘要 |
PURPOSE:To facilitate writing and to speed reading by reducing a current flowed from a word line on the injector side of an integrated injection logical element during information writing to a memory cell, and increasing the current during information reading. CONSTITUTION:A memory cell C1 of I<2>L is equipped with word lines W1 and W2, bit lines B0 and B1, an NPN transistor (TR) N1 for driving the word lines, a constant current source CS1 for holding the information of the memory cell, and an AND circuit G1 for driving the NPNTRN1. A word line selection signal is inputted to an input A of the AND circuit G1 to select a word line at a high level. A write-read switching signal is applied to an input B to perform reading at the high level or writing at a low level. During writing, the TRN1 turns off to reduce the word line current, facilitating the writing. During reading, the TRN1 turns on to increase the word line current, realizing high-speed reading. |
