| 摘要 |
PURPOSE:To reduce the area of a wiring layer connecting to a gate electrode, and to enlarge the degree of freedom on design by forming the wiring layer so as to cross transversely on a source region or a drain region. CONSTITUTION:An impurity diffusion region 1 functioning as the source region and the drain region, the gate electrode 2 of polycrystal silicon shaped onto the region 1 and the wiring layers 3 of the same polycrystal silicon are formed to a single crystal silicon substrate 4. Here, the wiring layers 3 required for connection with other elements are shaped onto the source region or the drain region at the same time as the gate electrode 2. When the width of the wiring layers 3 is L and the junction depth of the source region and the drain region is Xj, diffusion layers are also shaped under the wiring layers 3 when the relationship of L<2Xj is formed, and the source region or the drain region substantially causing no trouble is obtained. |
