发明名称 PHASE LOCKED LOOP CIRCUIT
摘要 PURPOSE:To decrease the power consumption of a phase lock loop circuit, by providing a switch which closes for a prescribed period when a change of the working conditions is detected for the main body of the loop circuit and then conducting an intermittent operation of the circuit main body. CONSTITUTION:A switch 7 which opens and closes the loop of the main body 6 of a PLL circuit by the control of a control circuit 8 is provided between a phase comparator 4 and a loop filter 5. A switch 11 is set between a frequency divider 3 and the comparator 4. When the switches 7 and 11 are closed, a voltage control oscillator 2 has oscillations with a locked frequency. Thus a switch 13 is changed over toward the filter 5, and the control voltage of the oscillator 2 is stored in a control circuit 8. The switches 7, 11 and 13 are opened after a prescribed period of time, and the loop of the main body 6 is set in a non-lock working state. However the oscillator 2 has its continuous operation. These switches are closed again when the value of a temperature detector 12 is changed from the stored value. Thus the oscillating frequency of the oscillator 2 is corrected.
申请公布号 JPS5866422(A) 申请公布日期 1983.04.20
申请号 JP19810165039 申请日期 1981.10.16
申请人 TOKYO SHIBAURA DENKI KK 发明人 OOBA RIYOUHEI;TSUTSUMI SHIYUUITSU;ITOU KOUICHI;ISHIKAWA TOMOO;FUSE SHIYOUJI;KUGE TOORU
分类号 H03L7/18;H03L1/02;H03L7/14 主分类号 H03L7/18
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