| 摘要 |
A driver circuit for use in testing either ECL (emitter-coupled logic) or TTL (transistor-transistor logic) devices. The circuit has a pair of variable reference voltages (VH, VL) for determining the logic levels 0 and 1. The circuit also has two termination networks (8, 9) for ECL and TTL, which are selectively connected to the output of the driver circuit according to the value of one of the reference voltages (VL). Preferably the circuit is formed as a hybrid network in which transistors from the same semiconductor slice are mounted on the same ceramic substrate. <IMAGE> |
