CONTROL METHOD FOR CASH MEMORY

摘要

PURPOSE:To obtain data coincidence between a main and cash memories by performing the processing of resetting a significant bit in a cash through invalidating processing and the processing of setting a new significant bit in the order of access signals to a common bus. CONSTITUTION:In response to a write access signal being transferred through a start bus 55 and a data bus 56 as common buses by time slots 1 and 3, a check on an invalidating directory 83 is made by time slots 2 and 4, and the contents of a significant bit register 84 are cleared in the former halves of time slots 3 and 5 to perform invadiating processing. With regard to read access which causes a cash error, an address is transferred to the start but 55 by the time slot 2, so access to a main memory is done after write access being transferred through the start bus 55 by the time slot 1 and after write access being transferred by the start bus 55 by the time slot 3.