| 摘要 |
<p>PURPOSE:To synchronize devices operating in different clock rates simply, by inputting a logical product output of the 1st and the 2nd clocks to a low-frequency input terminal selecting both the clocks one of which is a multiple of the other. CONSTITUTION:In a PCM line system, an oscillator 1 oscillates a frequency, e.g., 2,048MHz and it is inputted to a counter 2, which oscillates clocks of 2,048MHz, 1,024MHz, and 8kHz frequencies and the clocks are inputted to a terminal A of a selector 3, an AND gate 7 and a decoder 4. The decoder 4 has a function setting the duty ratio, its output is inputted to a reset terminal PC of an FF5 and the 8kHz clock is inputted to a clock terminal CP of the FF5. The output of the gate 7 is inputted to a terminal B of the selector 3, and when the output of the FF5 is 1, the selector 3 selects a B input and gives an output to a terminal 6. When the output of the FF5 is zero, the selector 3 outputs an A input. The decoder 4 and the FF5 output the clocks of 1,024 and 2,048MHz to the terminal 6 in the timing ratio of 63:65.</p> |
