| 摘要 |
PURPOSE:To reduce the circuit threshold voltage of a CMOS inverter, by providing an MOSFET operated at the saturation region between a CMOS inverter and a power source applying a positive potential. CONSTITUTION:A CMOS inverter 10 consists of a p-MOSFET 11 and an n- MOSFET 12 in which the drains are connected in series and the gates are connected in parallel, and the substrate of the FETs 11, 12 is set to a power supply potential VDD and a ground potential VSS respectively. The gate of both FETs is taken as an input terminal (a) and the connecting point of the series connection is taken as an output point (b). The source (c) of the FET11 is connected with the source of an n-MOSFET 13, the voltage VDD is applied to the gate and drain of the FET13 to operate the FET13 at the saturation region. If the threshold voltage of the FET13 is taken as Vthn, a voltage applied to the inverter 10 is set to VDD-Vthn, the threshold voltage Vthc of the inverter 10 comes to (VDD-Vthn)/2 and then, the circuit threshold voltage can be decreased by increasing the occupied area of a chip slightly. |
