发明名称 STORAGE PROTECTING CIRCUIT
摘要 PURPOSE:To perform protection with low power consumption by supplying a power voltage to the storage element selection terminal of a CMOS memory through a resistance, and inputting a selection signal or an inverted signal from a microprocessor to the selection terminal through a transistor (TR) inverter. CONSTITUTION:The output voltage 104 of a switching circuit 5 is supplied to the storage element selection terminal 106 of a CMOS memory 7 through a resistance 28. The collector of a TR27 is connected to the selection terminal 106, the emitter is connected to the output of an excessively low voltage detecting circuit 104, and a signal obtained by inverting the signal 105 of a microprocessor 1 through an inverting circuit 26 is inputted to the base. When a main power source 2 is turned off or in trouble, the TR27 turns off to supply the output 102 of a backup power source 3 through a switching circuit 5. This voltage is supplied to the power terminal Vcc of the CMOS memory 7 as well to inhibit storage holding, and writing and reading operation. Consequently, only small electric power is required for the storage protection during a break of the main power source.
申请公布号 JPS5864700(A) 申请公布日期 1983.04.18
申请号 JP19810162607 申请日期 1981.10.14
申请人 NIPPON DENKI KK 发明人 MORIKAWA SAICHI
分类号 G06F1/26;G06F1/28;G06F12/16;G06F15/78;H02J9/00 主分类号 G06F1/26
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