发明名称 DATA MULTIPLEXER
摘要 PURPOSE:To prevent the leakage of data between channels with a simple constitution, by scrambling output data series of each channel at a bundle, transmitting data with replaced output bits and inverting the data at the reception side. CONSTITUTION:Data series (a-c) of channels chA-chC are inputted to a parallel serial converter 41, its output data is randomized at a scrambler 43 and inputted to a serial parallel converter 45 as a data series (d). The bit arrangement of signals outputted from the converter 45 as data series (alpha-gamma) is replaced at a bit arrangement converting section 47 to become data series (x-z), the signals are multiplexed at a transmission section 11 and outputted serially. A reception section 12 parallel-converts reception data, and the bit arrangement is restored at a bit arrangement restoring section 48 and the data are converted serially at a parallel serial conversion section 46 and inputted to a descrambler 44, this output is serial/parallel-converted 42 to restore the data series (a-c) of each CH. If the frame synchronism is not correctly taken, no random signal series is outputted and the leakage of data can be prevented.
申请公布号 JPS5864836(A) 申请公布日期 1983.04.18
申请号 JP19810162609 申请日期 1981.10.14
申请人 NIPPON DENKI KK 发明人 TATSUI NORITAKA
分类号 H04J3/10;H04L5/22;H04L9/00 主分类号 H04J3/10
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