| 摘要 |
PURPOSE:To eliminate the influence of variation in the processing time of a program including processing instructions for data, and to perform accurate fault detection, by setting a reference value for a fault decision great, and comparing with the counted value of a counter on the basis of said set value. CONSTITUTION:A decoder DEC provided in a computer decodes an instruction for data processing and then supplies the result to the set terminal of a flip- flop FFC together with an added logical value. Further, a counter CNT consists of two FFs 0 and 1, and a constant-period pulse signal 5 is applied as a count input to the FFO. Furthermore, a reset signal 6 is supplied to the FFs 1 and 2. This FF2 is provided with three-bit counting ability during the processing instruction decoding of the counter CNT, and the output of the FF1 is applied to an AND gate AND to be processed logically with the output of the FFC. Then, the output of the gate AND and the output of the FF2 are applied to an emergency circuit EMC to eliminate the influence of variation in the processing time of a program, performing accurate fault detection. |
