| 摘要 |
PURPOSE:To improve the transfer efficiency, by quickening decoding of each parameter for data transfer control block in preprocessing at data transfer. CONSTITUTION:When data transfer of parameters P1-Pn is started from a CPU, a flip-flop 12 is set at parameter data P1-Pn with a set signal b1 corresponding to the data transfer. A count-up signal b2 is inputted to a counter 13 for setting, the counter 13 outputs count data C1-Cn at each time and the data are decoded at a decoder 14. The output of the decoder 14 is given to parameter registers R1-Rn as set pulse signals d1-dn sequentially, and the parameter corresponding to the data is stored in corresponding parameter registers R1-Rn from a data line (g). |
