| 摘要 |
PURPOSE:To correct an error without dropping the use rate of a storage device, and to elevate reliability, by utilizing a refresh cycle of a dynamic memory element when an error is detected and rewrite is executed. CONSTITUTION:When an error read out from a storage device 5 is detected by an error detecting and correcting circuit 8, an error detecting signal is sent, and an error flag register 7 is set. At the same time, an error address holding circuit 6 is also set. When 3 conditions become complete, such as an error is generated from the register 7, an address sent out from a refresh controlling circuit 11 coincides with an address having an error by a coinciding circuit 9, and there is a refresh cycle from the circuit 11, an AND circuit 13 opens the gate, switches a switching circuit 2 and a switching circuit 4, to the circuit 6 side, and a data holding circuit 10 side which has received an error corrected data from the circuit 8, respectively, and also sends a write control signal by driving a timing controlling circuit 12. In this way, rewrite is executed. |
